Concept of Operation

The half adder circuit performs binary addition on two one-bit binary inputs. The output of the circuit are the sum and the carry bits.

In binary addition:

0 + 0 = 0 (sum = 0, carry = 0)
0 + 1 = 1 (sum = 1, carry = 0)
1 + 0 = 1 (sum = 1, carry = 0)
1 + 1 = 10 (sum = 0, carry = 1)

The logic of this process expressed as a truth table is:

Observe that the sum bit is equivalent to the Exclusive OR (XOR) operation: if A or B is 1 the output is 1, but if both A and B equal 0 or 1 then the output is 0.

Observe also that the carry bit is equivalent to the AND operation: if both A and B are 1 then the output is 1, otherwise the output is low.

The half adder is implemented here using 74HCxx series high-speed CMOS digital logic ICs: the SN74HC86 (7486) and SN74HC08 (7408).

Schematic

Breadboard Diagram

Parts

• SN74HC86 - Quad 2-Input XOR Gate IC (x1)
• SN74HC08 - Quad 2-Input AND Gate IC (x1)
• 10K Resistor (x2)
• Green 5v LED (x2)
• 8 Position DIP Switch (x1)

(All parts for the project are available in our store.)

SN74HC08 Pinout

SN74HC86 Pinout

Notes on Implementation

1. In the schematic the 8 position DIP switch appears as two devices and unused switches are not shown. Refer to the board diagram for placement of the DIP switches.
2. Be mindful of the notch on the IC package which indicates proper orientation of the device.
3. The schematic symbols for the IC logic gates with multiple gates per chip are noted with A, B etc. to designate the different gates on the same chip.
4. The LEDs used in the project have a built in current limiting resistor eliminating the need for an external resistor to protect the device. This resistor is shown in the schematic as a resistor with the value “Lim” for completeness.
5. The circuit was built and tested at 4.8 volts DC (4 AA NiMH rechargeable batteries). The 74HCxx series ICs are rated from 2 to 6 volts.